Intel Recruitment 2020 – Silicon Packaging Design Lead Engineer

Job Id: 20200928014

Company: Intel

Job Role: Silicon Packaging Design Lead Engineer

Experience: 6-8 Years

Qualification: Graduate

Job Location: Bangalore

Salary: Best in Industry

Vacancies: Not Mentioned

Website: www.Intel.com

Job Description Intel Recruitment 2020 Job Vacancies for Silicon Packaging Design Lead Engineer in September 2020:

The engineer is responsible for leading the design from the planning phase/early pathfinding to the package tape out of high-density package substrates for Intel Microprocessors and Chipsets. It is expected that the lead has a strong understanding of PCB and package technology aspects, covering electrical, power, thermal, mechanical disciplines. The role requires the engineer to collaborate and work with highly multi-disciplined teams spread across different geos. Must have experience in delivering high-speed PCBs or high density flip chip interconnect based package designs, using Mentor Xpedition or Allegro Tool for physical design.The responsibilities include:- Support the development of pinmap/ballmap, in collaboration with the Senior Package Design, System Hardware, Power Integrity, and Signal Integrity engineers. – Owning the route and fit studies, during the early phase of package definition. – Planning and executing the package substrate design activities, meeting the schedule and quality expectations, throughout the development process cycle. – Driving design reviews with stakeholders

Qualifications

Qualifications: Should possess a Bachelor of Engineering or a Master degree of Science/Engineering in the field of Electronics and Communication.. Candidates with strong PCB physical design with good knowledge of Mentor tool will be considered. Experience/Competencies: – 6-8 years of experience in designing PCBs or Packages for high speed products like CPUs/ASICs/Chipsets at least, 2-3 years in leading package design -Exposure to different Package technologies, an advantage – Exposure to Package/Board physical design tool – Mentor Expedition and/or Allegro is needed – Prior experience in using electrical design analysis tools such as Ansoft, HSpice, Sigrity will be added advantage – Must be data-driven and process-oriented and Strong stakeholder management skills – Motivated, self-directed, and able to work effectively, both independently and within a team

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