Hardware Engineer – FPGA Verification
This position is for an experienced FPGA verification engineer for supporting FPGA development Programs for Packet Networking hardware acceleration of Ethernet, MPLS, and IP OAM and SAT (Service Activation Testing) protocols, statistics, packet timing, TDM circuit emulation, as well as, system glue logic for packet access switching and routing platforms.
The successful candidate will lead the chip level verification activities for a variety of FPGA designs and will be responsible for (but not limited to) the following:
- establish verification methodology, architecture, and infrastructure including models, generators, monitors, scoreboards, etc.
work with the design team to establish test priorities and coverage targets.
create verification plans
create and executing testcases
triage regressions, providing reports to the team and driving bug fix activities
collaborate with peers and mentor junior verification engineers on verification methodologies and best practices
provide accurate and timely project schedule estimates
- experience in developing testbench environments using System Verilog and UVM
experience with both directed and constrained-random stimulus generation
good problem solving and debugging skills
a good sense of overall priorities and ability to make smart trade-offs given the typical timelines of FPGA designs
experience with Mentor Graphics Questa and Synopsys VCS verification tools
working knowledge of PC and Unix/Linux operating systems
• Capability to give technical leadership to small team of Verification engineers (mentorship)
• Independent self-starter
• Strong commitment to product excellence
• Excellent communications skills
Collaboration with stakeholders
Strong software analysis, design, coding, testing, and documentation skills.
Ability to resolve complex issues that may require design trade-offs.
Areas of impact
Position requires proficient troubleshooting and Problem solving skills
Team oriented; strong inter-personal skills and ability to understand customers’ needs, expectations and perspective
Demonstrated ability to multitask on multiple projects
Demonstrated communications skills, both verbal and written, to effectively communicate/collaborate with remote QA and Development teams
Strong commitment to product excellence and quality
Contributes (may take lead role) on a project team of engineers involved in the release and test of software. Quickly comes up to speed in understanding of advanced concepts/methodology and contributes to improving and extending the impact and effectiveness of those concepts or new approaches to the current project.
- Bachelor’s degree in Engineering or equivalent
Minimum 2+ Years Experience as an FPGA/ASIC Verification Engineer.
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